The present invention relates to a multi-metal layer wiring TAB (tape automated bonding) tape carrier, in which conductive metal layers arranged on the two surfaces of a dielectric film layer are electrically connected through a conductive via layer formed in interfacial connection holes such as through holes, and a process for fabricating the TAB tape carrier.
In recent years, as a lead frame for a semiconductor device, there has been developed a lead frame of a multi-metal to layer structure, which is excellent in transmission characteristics of radio-frequency signals. The lead frame having such multi-metal layer structure employs the multi-metal layer wiring TAB tape carrier.
This multi-metal layer wiring TAB tape carrier is known in the prior art, as disclosed in U.S. Pat. No. 4,997,517. According to this disclosure, an dielectric film layer is interposed between a plurality of conductive metal layers having a predetermined wiring pattern to insulate the conductive metal layers electrically, and the dielectric film layer is formed with interfacial connection holes, in which is formed by an electrolytic plating method a conductive via layer for electrically connecting the surface and back conductive metal layers through the dielectric film layer.
Such multi-metal layer wiring TAB tape carrier is constructed, as shown in FIGS. 7 and 8, by forming a (not-shown) device hole corresponding to an IC element in a dielectric film layer 31 made of a resin such as organic polyimide or glass epoxy, and by forming a surface conductive metal layer 33 on the surface of the dielectric film layer 31 via an adhesive layer 32 and a back conductive metal layer 34 on the back of the dielectric film layer 31. The surface conductive metal layer 33 is formed with a wiring pattern, which is connected with the IC element. On the other hand, the back conductive metal layer 34 of the multi-metal layer wiring TAB tape carrier is either connected with a power supply or grounded to the earth. Moreover, the dielectric film layer 31 is formed with interfacial connection holes such as via holes 35 extending to the surface and back, and a conductive via layer 36 is formed on the inner walls of the via holes 35 by the panel or pattern plating method to connect the surface conductive metal layer 33 and the back conductive metal layer 34 electrically.
In the aforementioned multi-metal layer wiring TAB tape carrier of the prior art, however, if the conductive via layer 36 on the inner walls of the via holes is formed by the panel plating method, a plated layer 37 having a larger thickness than the conductive via layer 36 is also formed over the surface conductive metal layer 33, as shown in FIG. 7, simultaneously with the formation of the conductive via layer 36. Thus, there arises a problem that it is difficult to form the wiring pattern of a photoresist later on the surface conductive metal layer. Especially, the aforementioned plated layer 37 is troubled in that it is thickened at the surface conductive metal layer and around the inner leads, to raise another problem that it is difficult to wire the surface conductive metal layer and the inner leads finely by the etching method. With the copper layer thus having its thickness increased or locally fluctuated, moreover, a trouble of short-circuiting may be caused by the unetched portion (i.e., the remaining copper layer). Generally speaking, the conductive via layer is required to have a thickness of 3 to 7 .mu.m, whereas the surface conductive metal layer and the portions around the inner leads are required to have a plated thickness of 10 to 20 .mu.m, i.e., three times as large as that of the thickness of the conductive via layer due to the concentration or the like of the plating current because the plating liquid is well stirred. For the fine wiring, it is essential to reduce the pitch and width of the wiring pattern of the surface conductive metal layer. Since these pitch and width of the pattern usually have their minimums regulated by the thickness of the surface conductive metal layer, the increase in the thickness of the surface conductive metal layer is a seriously undesired phenomenon.
In the aforementioned multi-metal layer wiring TAB tape carrier of the prior art, on the other hand, if the conductive via layer 36 of the via holes 35 is formed by the pattern plating method after the surface conductive metal layer 33 is formed with the wiring pattern, a discrepancy 6 is established, as shown at (b) in FIG. 8, between the wiring pattern and the pattern formed by the photoresist, due to the limitation to the registration accuracy of the photoresist in case the wiring pattern has a small width (e.g.., no more than 200 .mu.m). This raises a problem that fine patterns are difficult to form. Incidentally, the case, in which the conductive metal layer 36 is formed in its normal position, is shown at (a) in FIG. 8.
Moreover, the aforementioned pattern plating method has to resort to an electric plating method, and is indispensible for electrode wiring. Thus, the wiring design is limited to raise a problem that it becomes difficult to provide fine wiring.